npn silicon planar epitaxial transistor this npn silicon epitaxial transistor is designed for use in linear and switching applications. the device is housed in the sot-223 package which is designed for medium power surface mount applications. ? pnp complement is pzt2907at1 ? the sot-223 package can be soldered using wave or reflow. ? sot-223 package ensures level mounting, resulting in improved thermal conduction, and allows visual inspection of soldered joints. the formed leads absorb thermal stress during soldering, eliminating the possibility of damage to the die. ? available in 12 mm tape and reel use pzt2222at1 to order the 7 inch/1000 unit reel. use pzt2222at3 to order the 13 inch/4000 unit reel. maximum ratings rating symbol value unit collector-emitter voltage v ceo 40 vdc collector-base voltage v cbo 75 vdc emitter-base voltage (open collector) v ebo 6.0 vdc collector current i c 600 madc total power dissipation up to t a = 25 c (1) p d 1.5 watts storage temperature range t stg 65 to +150 c junction temperature t j 150 c thermal characteristics thermal resistance from junction to ambient r q ja 83.3 c/w lead temperature for soldering, 0.0625 from case time in solder bath t l 260 10 c sec device marking p1f electrical characteristics (t a = 25 c unless otherwise noted) characteristic symbol min max unit off characteristics collector-emitter breakdown voltage (i c = 10 madc, i b = 0) v (br)ceo 40 e vdc collector-base breakdown voltage (i c = 10 m adc, i e = 0) v (br)cbo 75 e vdc emitter-base breakdown voltage (i e = 10 m adc, i c = 0) v (br)ebo 6.0 e vdc base-emitter cutoff current (v ce = 60 vdc, v be = 3.0 vdc) i bex e 20 nadc collector-emitter cutoff current (v ce = 60 vdc, v be = 3.0 vdc) i cex e 10 nadc emitter-base cutoff current (v eb = 3.0 vdc, i c = 0) i ebo e 100 nadc 1. device mounted on an epoxy printed circuit board 1.575 inches x 1.575 inches x 0.059 inches; mounting pad for the collector l ead min. 0.93 inches 2 . preferred devices are on semiconductor recommended choices for future use and best overall value. on semiconductor ? semiconductor components industries, llc, 2001 march, 2001 rev. 3 1 publication order number: pzt2222at1/d base 1 collector 2, 4 3 emitter pzt2222at1 sot-223 package npn silicon transistor surface mount on semiconductor preferred device case 318e-04, style 1 to-261aa 1 2 3 4
pzt2222at1 http://onsemi.com 2 electrical characteristics e continued (t a = 25 c unless otherwise noted) characteristic symbol min max unit off characteristics (continued) collector-base cutoff current (v cb = 60 vdc, i e = 0) (v cb = 60 vdc, i e = 0, t a = 125 c) i cbo e e 10 10 nadc m adc on characteristics dc current gain (i c = 0.1 madc, v ce = 10 vdc) (i c = 1.0 madc, v ce = 10 vdc) (i c = 10 madc, v ce = 10 vdc) (i c = 10 madc, v ce = 10 vdc, t a = 55 c) (i c = 150 madc, v ce = 10 vdc) (i c = 150 madc, v ce = 1.0 vdc) (i c = 500 madc, v ce = 10 vdc) h fe 35 50 70 35 100 50 40 e e e e 300 e e e collector-emitter saturation voltages (i c = 150 madc, i b = 15 madc) (i c = 500 madc, i b = 50 madc) v ce(sat) e e 0.3 1.0 vdc base-emitter saturation voltages (i c = 150 madc, i b = 15 madc) (i c = 500 madc, i b = 50 madc) v be(sat) 0.6 e 1.2 2.0 vdc input impedance (v ce = 10 vdc, i c = 1.0 madc, f = 1.0 khz) (v ce = 10 vdc, i c = 10 madc, f = 1.0 khz) h ie 2.0 0.25 8.0 1.25 k w voltage feedback ratio (v ce = 10 vdc, i c = 1.0 madc, f = 1.0 khz) (v ce = 10 vdc, i c = 10 madc, f = 1.0 khz) h re e e 8.0x10 -4 4.0x10 -4 e small-signal current gain (v ce = 10 vdc, i c = 1.0 madc, f = 1.0 khz) (v ce = 10 vdc, i c = 10 madc, f = 1.0 khz) h fe 50 75 300 375 e output admittance (v ce = 10 vdc, i c = 1.0 madc, f = 1.0 khz) (v ce = 10 vdc, i c = 10 madc, f = 1.0 khz) h oe 5.0 25 35 200 m mhos noise figure (v ce = 10 vdc, i c = 100 m adc, f = 1.0 khz) f e 4.0 db dynamic characteristics current-gain e bandwidth product (i c = 20 madc, v ce = 20 vdc, f = 100 mhz) f t 300 e mhz output capacitance (v cb = 10 vdc, i e = 0, f = 1.0 mhz) c c e 8.0 pf input capacitance (v eb = 0.5 vdc, i c = 0, f = 1.0 mhz) c e e 25 pf switching times (t a = 25 c) delay time (v cc = 30 vdc, i c = 150 madc, i b( ) = 15 madc v eb( ff) = 0 5 vdc) t d e 10 ns rise time i b(on) = 15 madc, v eb(off) = 0.5 vdc) figure 1 t r e 25 storage time (v cc = 30 vdc, i c = 150 madc, i b( ) =i b( ff) = 15 madc) t s e 225 ns fall time i b(on) = i b(off) = 15 madc) figure 2 t f e 60
pzt2222at1 http://onsemi.com 3 v i 90% 10% t p t r 0 v cc r2 r1 v i d.u.t. v o figure 1. input waveform and test circuit for determining delay time and rise time figure 2. input waveform and test circuit for determining storage time and fall time v i = 0.5 v to +9.9 v, v cc = +30 v, r1 = 619 w , r2 = 200 w . pulse generator: oscilloscope: pulse duration t p 200 ns input impedance z i > 100 k w rise time t r 2 ns input capacitance c i < 12 pf duty factor d = 0.02 rise time t r < 5 ns t f 100 m s -13.8 v 0 +16.2 v v i time v cc vo oscilloscope d.u.t. v i r2 r3 r4 d1 r1 v bb
pzt2222at1 http://onsemi.com 4 information for using the sot-223 surface mount package minimum recommended footprint for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. with the correct pad geometry, the packages will self align when subjected to a solder reflow process. sot-223 0.079 2.0 0.15 3.8 0.248 6.3 0.079 2.0 0.059 1.5 0.059 1.5 0.059 1.5 0.091 2.3 0.091 2.3 mm inches sot-223 power dissipation the power dissipation of the sot-223 is a function of the pad size. this can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. power dissipation for a surface mount device is determined by t j(max) , the maximum rated junction temperature of the die, r q ja , the thermal resistance from the device junction to ambient, and the operating temperature, t a . using the values provided on the data sheet for the sot-223 package, p d can be calculated as follows: p d = t j(max) t a r q ja the values for the equation are found in the maximum ratings table on the data sheet. substituting these values into the equation for an ambient temperature t a of 25 c, one can calculate the power dissipation of the device which in this case is 1.5 watts. p d = 150 c 25 c = 1.5 watts 83.3 c/w the 83.3 c/w for the sot-223 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 1.5 watts. there are other alternatives to achieving higher power dissipation from the sot-223 package. one is to increase the area of the collector pad. by increasing the area of the collector pad, the power dissipation can be increased. although the power dissipation can almost be doubled with this method, area is taken up on the printed circuit board which can defeat the purpose of using surface mount technology. a graph of r q ja versus collector pad area is shown in figure 3. 0.8 watts 1.25 watts* 1.5 watts r , thermal resistance, junction to ambient (c/w) q ja a, area (square inches) 0.0 0.2 0.4 0.6 0.8 1.0 160 140 120 100 80 figure 3. thermal resistance versus collector pad area for the sot-223 package (typical) board material = 0.0625 g10/fr4, 2 oz copper t a = 25 c *mounted on the dpak footprint another alternative would be to use a ceramic substrate or an aluminum core board such as thermal clad ? . using a board material such as thermal clad, an aluminum core board, the power dissipation can be doubled using the same footprint.
pzt2222at1 http://onsemi.com 5 solder stencil guidelines prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. a solder stencil is required to screen the optimum amount of solder paste onto the footprint. the stencil is made of brass or stainless steel with a typical thickness of 0.008 inches. the stencil opening size for the sot-223 package should be the same as the pad size on the printed circuit board, i.e., a 1:1 registration. soldering precautions the melting temperature of solder is higher than the rated temperature of the device. when the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. ? always preheat the device. ? the delta temperature between the preheat and soldering should be 100 c or less.* ? when preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. when using infrared heating with the reflow soldering method, the difference should be a maximum of 10 c. ? the soldering temperature and time should not exceed 260 c for more than 10 seconds. ? when shifting from preheating to soldering, the maximum temperature gradient should be 5 c or less. ? after soldering has been completed, the device should be allowed to cool naturally for at least three minutes. gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. ? mechanical stress or shock should not be applied during cooling * soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.
pzt2222at1 http://onsemi.com 6 typical solder heating profile for any given circuit board, there will be a group of control settings that will give the desired heat pattern. the operator must set temperatures for several heating zones, and a figure for belt speed. taken together, these control settings make up a heating aprofileo for that particular circuit board. on machines controlled by a computer, the computer remembers these profiles from one operating session to the next. figure 4 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. this profile will vary among soldering systems but it is a good starting point. factors that can af fect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. this profile shows temperature versus time. the line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. the two profiles are based on a high density and a low density board. the vitronics smd310 convection/infrared reflow soldering system was used to generate this profile. the type of solder used was 62/36/2 tin lead silver with a melting point between 177189 c. when this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. the components on the board are then heated by conduction. the circuit board, because it has a large surface area, absorbs the thermal energy more ef ficiently, then distributes this energy to the components. because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints. step 1 preheat zone 1 ramp" step 2 vent soak" step 3 heating zones 2 & 5 ramp" step 4 heating zones 3 & 6 soak" step 5 heating zones 4 & 7 spike" step 6 vent step 7 cooling 200 c 150 c 100 c 50 c time (3 to 7 minutes total) t max solder is liquid for 40 to 80 seconds (depending on mass of assembly) 205 to 219 c peak at solder joint desired curve for low mass assemblies desired curve for high mass assemblies 100 c 150 c 160 c 170 c 140 c figure 4. typical solder heating profile
pzt2222at1 http://onsemi.com 7 package dimensions case 318e04 issue k sot223 (to261) h s f a b d g l 4 123 0.08 (0003) c m k j dim a min max min max millimeters 0.249 0.263 6.30 6.70 inches b 0.130 0.145 3.30 3.70 c 0.060 0.068 1.50 1.75 d 0.024 0.035 0.60 0.89 f 0.115 0.126 2.90 3.20 g 0.087 0.094 2.20 2.40 h 0.0008 0.0040 0.020 0.100 j 0.009 0.014 0.24 0.35 k 0.060 0.078 1.50 2.00 l 0.033 0.041 0.85 1.05 m 0 10 0 10 s 0.264 0.287 6.70 7.30 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch.
pzt2222at1 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 13036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. pzt2222at1/d thermal clad is a trademark of the bergquist company north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland
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